CHDL1: Implementing a simplified version of the CompactHDL hardware description language
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F.M. Birleanu, B.A. Enache, M. Alexandru, “First steps towards designing a compact language for the description of logic circuits,†Proceedings of the International Conference on Communications (COMM), 9-10 June 2016.
G. R. Smith, FPGAs 101: Everything You Need to Know to Get Started. Elesevier (Newnes), 2010.
B. J. LaMeres, Introduction to Logic Circuits & Logic Design with VHDL. Springer International Publishing, 2017.
E. Bezerra, D.V. Lettnin, Synthesizable VHDL Design for FPGAs. Springer International Publishing, 2014.
S.C. Reghizzi, L. Breveglieri, A. Morzenti, Formal languages and compilation. Springer-Verlag London, 2013.
T. Copeland, Generating Parsers with JavaCC: An Easy-to-Use Guide for Developers. Alexandria, VA: Centennial Books, 2013.
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