Comparative Study of Symmetric and Asymmetric Oxide Double Gate Junction less FET

Kunal Kumar

Abstract


we carry out the performance of symmetric oxide (HfO2+HfO2) and asymmetric oxide (SiO2+HfO2) n-type junction less field-effect transistor (JLFET) based on two- dimensional Poisson equation. This study is accomplished by simulating a symmetric and asymmetric double gate JLFET on Sentaurus, Technology Computer Aided Design (TCAD) simulator for Silicon (Si) material at room temperature and varying temperature in between 300-360 K. Based on device simulation we find that the asymmetric oxide shows preferable performance in terms of ON-state current (ION), subthreshold swing(SS), the ION/IOFF ratios (~107) and the equivalent oxide thickness (EOT) compared to symmetric devices and also asymmetric oxide technology enhances the performance and reduces the power consumptions.


Full Text:

PDF

References


no


Refbacks

  • There are currently no refbacks.


Copyright (c) 2021 Journal of Electrical Engineering, Electronics, Control and Computer Science

Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.